Build results: qbe
[OK] 2d02070af019e9896ecf2a63bedc098092fd395d
new hinting in the register allocator
The previous heuristics were ad hoc and it was
hard to understand why they worked at all.
This patch can be summarized in three points:
1. When a register is freed (an instruction
assigns it), we try to find if a temporary
would like to be in it, and if we find one,
we move it in the newly freed register.
I call this an "eager move".
2. Temporaries now remember in what register
they were last allocated; this information
is stored in the field Tmp.visit, and
prevails on the field Tmp.hint when it is
set. (This makes having the same hint for
interfering temporaries not so disastrous.)
3. Blocks are now allocated in "onion" order,
from the innermost loop to the outermost.
This is the change I am the least sure
about; it should be evaluated thorougly.
OK: build: make
STDOUT
cc main.c
cc util.c
cc parse.c
cc cfg.c
cc mem.c
cc ssa.c
cc alias.c
cc load.c
cc copy.c
cc fold.c
cc live.c
cc spill.c
cc rega.c
cc gas.c
cc amd64/targ.c
cc amd64/sysv.c
cc amd64/isel.c
cc amd64/emit.c
cc arm64/targ.c
cc arm64/abi.c
cc arm64/isel.c
cc arm64/emit.c
ld obj/qbe
STDERR
OK: test: make check
STDOUT
tools/test.sh all
abi1.ssa... [ok]
abi2.ssa... [ok]
abi3.ssa... [ok]
abi4.ssa... [ok]
abi5.ssa... [ok]
abi6.ssa... [ok]
align.ssa... [ok]
collatz.ssa... [ok]
cprime.ssa... [ok]
cup.ssa... [ok]
dark.ssa... [ok]
double.ssa... [ok]
echo.ssa... [ok]
eucl.ssa... [ok]
euclc.ssa... [ok]
fixarg.ssa... [ok]
fpcnv.ssa... [ok]
ldbits.ssa... [ok]
ldhoist.ssa... [ok]
loop.ssa... [ok]
mandel.ssa... [ok]
max.ssa... [ok]
philv.ssa... [ok]
prime.ssa... [ok]
puts10.ssa... [ok]
queen.ssa... [ok]
strcmp.ssa... [ok]
strspn.ssa... [ok]
sum.ssa... [ok]
vararg1.ssa... [ok]
vararg2.ssa... [ok]
All is fine!
STDERR
OK: clean: make clean
STDOUT
rm -fr obj
STDERR